Omniaxiom Universal AI Model · derived spec

Architecture systems design blueprint

Omniaxiom Universal AI Model — a verification-first, single-model cognitive runtime with a geometric typed IR, an IFIS-based discrete verifier, and versioned temporal memory.

Revision: v0.1 (derived spec) · Status: Design-level specification. Nothing in this document has been measured on a running system.

How to read this spec

Maturity tags separate textbook math, buildable design, hypotheses to test, and metaphor that must not block shipping.

[S] Standard

Established mathematics or engineering (Euler characteristic, SVD, Regge deficit angles, Clifford rotors, GRPO, Lean 4).

Use as-is; cite textbooks.

[D] Design

A concrete implementable decision (dual-pathway tensors, verifier-gated decoding, event-log memory).

Build it; it needs tests, not proofs of possibility.

[H] Hypothesis

Plausible but unmeasured claim about behaviour or performance.

Build the experiment before asserting it.

[X] Speculative

No operational definition or falsifiable content as stated (c127 tiers, Blazar/CMB cosmology, knot security, hardware untying deadlocks).

Not on the critical path; research notes only.

One model, verification-first class

A single AI model — continuous neural proposer plus discrete IFIS verifier/controller — not a 25-agent fleet. Every token, plan step, or action survives a typed check before commitment.

Peers in the class include neural + symbolic systems (AlphaGeometry, AlphaProof, LLM-Modulo generate-test-critique loops). What must be proven here is the geometric IR, dual pathway, verifier halting, and quorum channels — not universe-scale cosmology claims.

Geometric typed IR [D]
20-stage type lattice with Metric / Angle / Dimension / Manifold annotations between proposer and verifier.
Dual-pathway hidden state [D]
A physical stream and a meta stream; stage labels and MemPrim operations emitted per step.
Verifier-driven halting [D]
CONVERGED / OSCILLATION / PRECISION_CAP / BUDGET_EXHAUSTED — not token-limit halting.
Number-system quorum [D]
Four cross-check channels: float magnitudes, monotone event ids, Belnap–Dunn status, CGN geometric embedding.

System context

user / env ──▶ Ingress: tokenizer + Universal Index (monotone event id)
        ▼
SYSTEM 1 — Continuous Proposer
  emits: {token, stage_label, primitive_op, confidence}
        ▼ Proposal
GEOMETRIC IR — 20-stage lattice + Metric/Angle/Dimension/Manifold
        ▼
SYSTEM 2 — Discrete Verifier (Rust IFIS)
  Γ substrate · MemPrim · parity · 10-component loop · spectral checks · quorum
  → Verdict {accept | partial | reject, recovery}
        ▼ accept                    ▼ reject
SYNTHESIS + FINAL GATE (re-verified)   Typed recovery → System 1
        ▼
MEMORY — append-only versioned event log (authoritative)

Design rule: no component may modify a verified artifact and keep its verification status automatically. Synthesis is re-checked at the final gate.

Omni Calculus strata (operational keep)

I

RH cognitive runtime / URF

Inner products, metric-weighted graph geodesics, schema-checked domain adapters.

Tag mix: [S] / [X]

II

Topology / knots / sheaves

Graph invariants, centrality, percolation thresholds.

Tag mix: [S]

III

Differential geometry / Lagrangian

Curvature/strain auxiliary losses; decoding as cost-minimizing path.

Tag mix: [H] / [X]

IV

Regge / graphs / number theory

Deficit angles, Laplacian diffusion, modular index constraints.

Tag mix: [S]

V

Clifford / Dirac / Pauli

Rotors on geometric embeddings; CGN as candidate algebra.

Tag mix: [S] / [H]

Forward-pass sequence

  1. 1Ingest: tokenize; stamp universal_index; load log records.
  2. 2Propose: System 1 emits {token, stage, primitive, confidence}.
  3. 3Lift to IR: type lattice + four annotations.
  4. 4Status gate: T / F / Both / Neither.
  5. 5Geometry: Gram/SVD, Cayley–Menger, deficit angles, pole cap → anti-root.
  6. 6Parity + MemPrim in Rust IFIS engine → Verdict.
  7. 7Halt decision (Self-Choice layer).
  8. 8Reject/partial: recovery glyph → bounded retry.
  9. 9Accept: commit trace; append event log.
  10. 10Synthesis at end of turn.
  11. 11Final gate: re-verify synthesis (no auto-inherited verification).
  12. 12Action path: bind approval; execute; reconcile log.

Latency: neural decode dominates; verifier steps should stay µs–ms per step. Pairs with workstations on the desk side; this document is the single-model runtime under the house ladder.

Positioning verdict

Not a class of its own on available evidence — a well-motivated member of verification-first compound AI. Distinctive design content is real and unmeasured until formal math, code-with-tests, and abstention benchmarks (§10 ablations) are run.

Retire or measure claims in the unproven register: “hallucinations as physical impossibilities,” c127 tiers, Blazar–CMB dynamics, guaranteed fast termination without implementation proof, and eBPF sub-millisecond cognition when decode dominates.

Deeper substrate: Design Patterns v3.0 (IFIS, twenty patterns, Part XII build + MVP) · URF / Arithmomorphic calculus(ten grammars).